About PowerDRC

PowerDRC dramatically reduces design cycle time, design iterations, compute infrastructure requirements and precious engineering time. Customers will benefit from reduced costs and enhanced opportunities to meet aggressive go-to-market windows.


  • Architected to address physical verification challenges for today’s deep sub-wavelength nanometer process nodes—40nm and above
  • Meets foundries accuracy requirements
  • Delivers maximum per-CPU speed & capacity
  • Predictable runtime, proportional to the number of devices
  • Scalable capacity over single- & multi-CPU
  • No need to “design around” the DRC tool to meet hierarchy considerations
  • Extra level of IP protection that comes naturally with flat DRC KEY


  • Ultra-fast scanning of layouts
  • DRC, ERC, XOR, and fill layers generation
  • Multi-CPU architecture, grid- and cloud-ready
  • Easy-to-learn powerful rule language allowing fast and easy migration
  • Easy-to-use GUI
  • Readily integrates with popular design environments
  • High flexibility due to a variety of run control parameters and pre-processing tools